CAN / FD Timing Designer

Nominal 및 Data Phase의 샘플 포인트를 각각 독립적으로 설계합니다.

Source Clock ($f_{CAN}$)

MHz

Arbitration Baudrate

kbps

Target Sample Point

Nominal Phase

Sync

1 TQ

Prop

Ph1

Ph2

BRP	T1	T2	TQ	SP	Err

$$TQ = \frac{BRP}{f_{CAN}}$$

$$Total\,TQ = 1 + TSEG1 + TSEG2$$

$$Sample\,Point = \frac{1 + TSEG1}{Total\,TQ} \times 100\%$$